Broadcom unveils gigantic 3.5D XDSiP platform for AI XPUs — 6000mm² of stacked silicon with 12 HBM modules

Broadcom’s 3.5D XDSiP platform for high-performance processors uses TSMC’s CoWoS and other packaging technologies to build a system-in-packages comprising 6000mm² of 3D-stacked silicon with 12 HBM modules. 

Broadcom’s 3.5D XDSiP platform for high-performance processors uses TSMC’s CoWoS and other packaging technologies to build a system-in-packages comprising 6000mm² of 3D-stacked silicon with 12 HBM modules.